In today’s microprocessors failure of few or even one device can have catastrophic consequences on the entire chip. So, each device must be accompanied by relevant reliability and robustness. Furthermore, mitigating power consumption by each device will enable us to save a huge amount of energy and power consumption on the entire chip and system.

At Stanford, I have done research on the next generation low power design; and proposed a next generation low power device. I conducted research on highly efficient next generation High Hole Mobility Transistor (HHMT) a key alternate device for CMOS, using Germanium on Insulator (GOI). GOI will have a good impact on performance in building new generations that would enable an entirely new class of hi-speed, low power, robust devices for chips and microprocessors. My proposed new device will reduce power and energy consumption by 35X.

I conducted research on how to create a highly efficient next generation solar cell accompanied by low-power and low-cost features. This device is based upon high absorption that would enable an entirely new class of high absorption, low power, low cost and robust solar cells. This would allow us to take full advantage of the rapid increase in power consumption and meet the increasingly challenging demands placed on the energy supply by the demands of daily lives.

At Stanford, I contributed to research in other areas, including new devices for microscopy, Optical Micro- and Nano-Cavities, photonic crystal cavities, plasmonic cavities, fabrication techniques. I also looked at applications of such optical cavities, including low-threshold lasers and verified these concepts through MATLAB solution.